AOSD62666E general description product summary v ds i d (at v gs =10v) 9.5a r ds(on) (at v gs =10v) < 14.5m? r ds(on) (at v gs =4.5v) < 19m? typical esd protection hbm class 2 applications 100% uis tested 100% rg tested ? motor control, lighting, industrial and load s witch AOSD62666E so-8 tape & reel 3000 60v dual n-channel alphasgt tm orderable part number package type form minimum order quantity 60v ? trench power alphasgt tm technology ? low r ds(on) ? logic level gate drive ? esd protected ? excellent gate charge x r ds(on) product (fom) ? rohs and halogen-free compliant g1 d1 s1 g2 d2 s2 g1 s1 g2 s2 d1 d1 d2 d2 2 4 5 1 3 86 7 top view soic-8 top view bottom view pin1 symbol v ds v gs i dm i as avalanche energy l=0.3mh c e as t j , t stg symbol t 10s steady-state steady-state r jl power dissipation b 1.6 t a =70c p d 60 2.5 gate-source voltage pulsed drain current c 7.5 parameter drain-source voltage continuous drain current maximum junction-to-lead c/w c/w maximum junction-to-ambient a d 30 85 40 va absolute maximum ratings t a =25c unless otherwise noted 20 v maximum units AOSD62666E so-8 tape & reel 3000 maximum junction-to-ambient a c/w r ja 42 70 50 parameter max c units junction and storage temperature range -55 to 150 typ thermal characteristics 14 38 mj 29 9.5 t a =25c t a =70c t a =25c avalanche current c w i d a rev.1.0: may 2017 www.aosmd.com page 1 of 5 downloaded from: http:///
AOSD62666E symbol min typ max units bv dss 60 v v ds =60v, v gs =0v 1 t j =55c 5 i gss 10 a v gs(th) gate threshold voltage 1.2 1.7 2.2 v 12 14.5 t j =125c 19.2 23.5 15.3 19 m? g fs 33 s v sd 0.72 1 v i s 3.5 a c iss 755 pf c oss 220 pf c rss 20 pf r g 0.6 1.3 2.0 ? q g (10v) 13.5 20 nc q g (4.5v) 6.5 10 nc q gs 2.5 nc q gd 3.0 nc q oss output charge v gs =0v, v ds =30v 11 nc t d(on) 5 ns t r 3 ns t d(off) 19 ns reverse transfer capacitance v gs =0v, v ds =30v, f=1mhz v ds =v gs, i d =250 a output capacitance forward transconductance i s =1a, v gs =0v v ds =5v, i d =9.5a v gs =10v, i d =9.5a v ds =0v, v gs =20v maximum body-diode continuous current input capacitance gate-body leakage current turn-off delaytime v gs =10v, v ds =30v, r l =3.15 , r gen =3 diode forward voltage dynamic parameters v gs =4.5v, i d =8.5a turn-on rise time gate source charge gate drain charge total gate charge switching parameters turn-on delaytime m? v gs =10v, v ds =30v, i d =9.5a total gate charge electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions gate resistance f=1mhz i dss a zero gate voltage drain current drain-source breakdown voltage i d =250 a, v gs =0v r ds(on) static drain-source on-resistance t d(off) 19 ns t f 3 ns t rr 15 ns q rr 45 nc applications or use as critical components in life support devices or systems are not authorized. aos does not assume any liability arising out of such applicatio ns or uses of its products. aos reserves the right to improve product design,functions and reliability without no tice. body diode reverse recovery charge body diode reverse recovery time i f =9.5a, di/dt=500a/ s turn-off delaytime turn-off fall time r gen =3 i f =9.5a, di/dt=500a/ s a. the value of r ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. the value in any given application depends on the user' s specific board design. b. the power dissipation p d is based on t j(max) =150 c, using 10s junction-to-ambient thermal resistance. c. repetitive rating, pulse width limited by junct ion temperature t j(max) =150 c. ratings are based on low frequency and duty cycl es to keep initialt j =25 c. d. the r ja is the sum of the thermal impedance from junction t o lead r jl and lead to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-ambien t thermal impedance which is measured with the devi ce mounted on 1in 2 fr-4 board with 2oz. copper, assuming a maximum junction temperatur e of t j(max) =150 c. the soa curve provides a single pulse rating. rev.1.0: may 2017 www.aosmd.com page 2 of 5 downloaded from: http:///
AOSD62666E typical electrical and thermal characteristics 0 10 20 30 40 50 1 2 3 4 5 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 0 5 10 15 20 25 0 3 6 9 12 15 r ds(on) (m ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 0.8 1 1.2 1.4 1.6 1.8 2 0 25 50 75 100 125 150 175 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =4.5v i d =8.5a v gs =10v i d =9.5a 25 c 125 c v ds =5v v gs =4.5v v gs =10v 0 10 20 30 40 50 0 1 2 3 4 5 i d (a) v ds (volts) figure 1: on-region characteristics (note e) v gs =2.5v 3v 4v 10v 3.5v 4.5v 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 0.0 0.2 0.4 0.6 0.8 1.0 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c 0 10 20 30 40 50 2 4 6 8 10 r ds(on) (m ) v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) i d =9.5a 25 c 125 c rev.1.0: may 2017 www.aosmd.com page 3 of 5 downloaded from: http:///
AOSD62666E typical electrical and thermal characteristics 1 10 100 1000 1e-05 0.001 0.1 10 power (w) pulse width (s) figure 10: single pulse power rating junction-to- ambient (note f) 0 2 4 6 8 10 0 3 6 9 12 15 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 200 400 600 800 1000 0 10 20 30 40 50 60 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss c oss c rss v ds =30v i d =9.5a t j(max) =150 c t a =25 c 10 s 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 i d (amps) v ds (volts) v gs > or equal to 4.5v figure 9: maximum forward biased safe operating area (note f) 10 s 1ms dc r ds(on) limited t j(max) =150 c t a =25 c 100 s 10ms 0.001 0.01 0.1 1 10 1e-05 0.0001 0.001 0.01 0.1 1 10 100 z ja normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) single pulse d=t on /t t j,pk =t a +p dm .z ja .r ja t on t p dm in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse safe operating area (note f) r ja =85 c/w rev.1.0: may 2017 www.aosmd.com page 4 of 5 downloaded from: http:///
AOSD62666E - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off id l vds bv unclamped inductive switching (uis) test circuit & waveforms vds dss 2 e = 1/2 li ar ar figure a: gate charge test circuit & waveforms figure b: resistive switching test circuit & waveform s figure c: unclamped inductive switching (uis) test c ircuit & waveforms vdd vgs vgs rg dut - + vdc vgs id vgs i ig vgs - + vdc dut l vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar di/dt i rm rr vdd vdd q = - idt t rr figure d: diode recovery test circuit & waveforms rev.1.0: may 2017 www.aosmd.com page 5 of 5 downloaded from: http:///
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